Juan David Guerrero Balaguera

Hey! thanks for visiting my webpage

I am a Postdoctoral Research Fellow of the CAD group in the Department of Control and Computer Engineering DAUIN from Politecnico di Torino - PoliTo in Turin, Italy.

I completed my Ph.D (2024) in Computer and Control Engineering from PoliTo, where I was advised by Prof. Matteo Sonza Reorda and Prof. Ernesto Sanchez. During my Ph.D I worked on the reliability enhancement of GPU architectures. Also, I obtained twice the Ph.D quality awards of my cycle. This distinction is given by the doctoral school of PoliTo to the best Ph.D students every year. I obtained bachelor’s and master’s degrees in electronics engineering from Universidad Pedagogica y Tecnologica de Colombia in 2013 and 2017, respectively.

From 2014 to 2020, I was an assistant professor at the Electronics Engineering School of the Universidad Pedagogica y Tecnologica de Colombia, where I used to teach digital design, embedded systems, computer architecture, and image processing with FPGAs.

My research work focuses on the design of dependable hardware for safety-critical applications, comprising a wide spectrum of flavors, including but not limited to:

• Advanced digital design for FPGAs
• Computational arithmetic for AI
• Accelerators for vision applications
• Functional in-field testing of hardware components (e.g., CPUs, and GPUs)
• Dependability and fault tolerance for AI accelerators
• AI reliability assessment (i.e., error modeling of hardware faults).